IC and IP cores design, verification, writing, and mathematics (AI, ML, heuristics etc)

• especially modem (modulation and demodulation) ICs and IP cores for wireless communications technologies incl satellite Internet (DVB).
• Math (AI/ML) for design, verification and quantum computer

My current design focuses on IP cores for wireless communications and other applications.

Current Focuses of IC Technologies

I am a professional IC designer and I am particularly interested in IP core design for communication systems such as satellite broadband modulation and demodulation. More information could be found on my website at http://www.ipcoredesign.net/

I orient myself as one of the top modem (modulation + demodulation) IC and IP core designers for communication systems such as satellite broadband modulation and demodulation over the next years. My aim is to explore the optimization of design methodologies.

I have studied satellite and wireless communications over the last couple of years, concentrating on modulation and demodulation for satellite broadband uplink communications in the DVB standard series. I have designed a demodulator IP core based on FPGA and CMOS, and I am preparing for another modem IP core based on probably SDR/DSP etc. In addition I have been preparing for a book called "Modulation and demodulation IC design for satellite communications" with special focus on broadband Internet uplink and LEO satellites operating according to DVB standards. I have been researching and designing ICs for the last 10 years or so.

I have been developing modem ICs for satellite broadband Internet, for ground use, over the last years. My designs are involved in satellite / wireless communications, modulation and demodulation, error correction and coding technologies and some wireless communications technologies, as well as IC design technologies, tools and methodologies. I am developing my modem ICs with the latest reconfigurable technologies based mainly on FPGA. On the FPGA many processing units such as GPU, DSP are integrated which can make the modems compatible with as many communications protocols, standards and modulation schemes as possible. I've developed some separate IPs such as modulators, and demodulators and at the moment I am working on a modulator based in FPGA, HDL and others to cope with several modulation schemes such as BPSK, FSK, MSK, OQPSK, UQPSK and for DVB S2X applications. The modem IPs are available as proprietorial IP products in the form of a binary netlist, which can be integrated into modem blocks of other modem vendors.

Design and Verification of IC & IP Cores

I have been a chip (IC) researcher and designer since 2013. I am particularly specialized in FPGA, DSP, SOC and RF design and I am also skilled at designing mixed analog and digital circuits.

My current design focuses on IP cores for wireless communications.

Among them, my first priority is for satellite broadband Internet in the DVB standard series. I am working on modulators based in FPGA, HDL and others to cope with several modulation schemes such as BPSK, FSK, MSK, OQPSK, UQPSK and for DVB S2/S2X/RCS2 applications. The modem IPs are available as proprietorial IP products in the form of HDL codes or binary netlists, which can be integrated into modem blocks of other modem vendors. The IP cores can then be incorporated further into VLSI circuits of various terminals, indoor and outdoor units and modems on the ground.

My secondary priority is on IP cores for the RFID protocols for IoT (Internet of Things), both for tags and readers as well as for WLAN/WiFi standards.

My third priority is on Verification of IP Cores and ICs. One of the biggest challenges to the IC engineers is the verification of the designs, therefore I am spending huge amount of time and efforts on this area of specialty. I am authoring a huge volume of books containing all aspects of the verification processes - from methodologies to languages, from platforms to testing systems. My first book in this direction will be related to verification languages with Python, and afterwards SystemC, VHDL, (System)Verilog and a bunch of other verification languages.；then come the verification methodologies - UVM, UVVM, OSVVM, OVM etc. The endless writing will continue for decades.

Writing about Design and Verification of IC & IP Cores

In addition to design, I am also involved in a couple of other services such as:
Authoring of the gigantic Book series titled “Silicon IP – Not just Design”,
Development of the Website for IP Core design (www.ipcoredesign.net)
in the areas of IC technologies.

Over the last year I’ve already completed several of the books in the area of Verification IP & IP Core Verification within the book family such as:

Review of Verification IP & IP Core Verification – An Abstract
Verification Methodologies-A Concise Introduction
Comprehensive Review of Hardware Verification Languages (Except Python)
Hardware Verification in Python

And now I am also writing the following book as a summarization of my IC development work:
Machine Learning for Hardware Verification

Brief introductions are available on my website at this link.
http://www.ipcoredesign.net/html/000mybook/mybook.htm

Quantum Routing & Beyond - Improving Quantum Computation by Optimized Qubit Routing

(Mathematics for Development and Design of Quantum Computer)
(Particularly Artificial Intelligence (Machine Learning and Others) & Heuristics for Development and Design of Quantum Computer)

This research is just the start of my huge research and writing plan in the quantum area. In fact, I have done a number of researches on quantum computer before, notably on graph theoretical aplications for quantum circuits design, in line with the D-Wave quantum computer developed by a Canadian company a couple of years ago. I don't know what is its status now, because since 2016 my quantum research is stopped.

I have been involving in AI well since 2013, when I was studying the graph-theoretical aspects of IC (integrated circuits) design, where AI is also key to developing EDA algorithms for VLSI design. A couple of years ago my IC verification activities have also been involving lots of AI/ML techniques and algorithms, as well as my quantum circuits design for example qubit routing which employs deep reinforcement learning to improve the routing efficiency. At the moment I am going to write and publish some works related to AI applications to AMS circuits verification, here AMS means Analog and Mixed Signal, because my current design of wireless communications system ICs, i.e. modulation and demodulation, is exactly an AMS system.

I will start from qubit routing with a comprehensive review of that area together with an indepth study of a specific topic, one no one has tried sofar. Afterwards my journey will continue with qubits, and then other areas of quantum computer, from quantum gates to quantum circuits and processors till finally to quantum computer, the ultimate goal of the research and studies. I hope others may join my ambitious project.

At the moment I am writing 1 book and 1 paper at the same time in the quantum compyter area:
1) Math (AI & Heuristics) for Qubit Routing – A Survey
2) Qubit Routing with Machine Learning (Reinforcement Learning etc)

The later will be a research paper in an intention to develop new algorithms in the direction of Machine Learning to improve the qubit routing efficiency, a critical area of quantum computer development.

Previous Studies of IC Technologies

My IC career started about in 2009 with researches on IC related math, epecially graph theory for IC layout. I have spent quite some time on doing some researches on graph theory involved in quantum circuits, especially the socalled graph embedding and Chimera graph.

I have also investigated a vast number of recently researched next generations of IC technologies after the silicon based ICs are coming to a standstill, among them also quantum chips and quantum computer. Others include spintronic bases, graphene, superconducting computer, single electron, resonant tunneling, DNA, biocomputing, neural computing etc.

However I don't have the necessary prerequisites and capacity to conduct IC research, such as an expensive lab or a great team, therefore I have to satisfy myself with some mathematical studies in connection with IC technologies.

Of course, almost all math branches are useful in IC technologies, but what I am interested in mostly is the design stage, and particularly the physical design stage, and over there graph theory has been playing a big role, as such I have spent quite some time on graph theory for IC design.

My first topic was graph theory for channel routing, which is the last phase of the physical design and hence also the last phase of the entire chip design process. I have explored a great number of routing algorithms, particularly for FPGA based logic, but finally I decided not to pursue it further because I consider it a waste of time to focus on traditional, silicon based IC technologies, as it is approaching a scaling limit, that is, there is no way to improve the computing power after the CMOS scale reaches nanometer. In other words, it is very difficult, if not impossible, to produce more powerful processors based on the current silicon chips. Therefore one has to find new materials, new physics and new technologies.

And then I have tried a number of new generations of IC technologies, among them, quantum circuits, graphene based circuits, superconducting chips, resonant tunneling circuits, 3D ICs, spintronics based chips, to name a few. But I found that none of them are able to replace the current IC technologies, at least for the near future.

Nevertheless, I have studied somewhat intensively about the graph theory for quantum computing, and at that time I was particularly interested in the socalled Chimera graph applications to quantum computer, which was devloped by D-Wave, a Canadian quantum computer pioneer. In connection with Chimera graph was my indepth review of graph embedding and related branches of graph theory.

Later on I have also stopped my graph theoretic researches on quantum computing due to some serious incidents and instead I was shifting to superconducting quantum computing, beginning with qubits, quantum gates and quantum circuits. It seemed that it was the only type of quantum computer that might become a really useful replacement for the current silicon based computer But the progress was too slow, and I don't want to waste my time on a technology without clear picture. Noone can foresee when a production level quantum computer may come out, therefore this study was also stopped about end 2017, when I determined to shift my focus from graph theory to really IC design technologies. And ths decision was final, regardless how quantum computing is making progress.

Our Design Projects

We have implemented various IC and IP core design and verification projects in the wireless communications, mainly in the areas of modulation and demodulation.

We have designed ICs and IP cores in various Hardware Design Languages (HDL) such as
VHDL
Verilog and its extensions and derivatives
as well as generic computer languages such as
Python and Python packages
Java
C/C++ and others.

We have applied different design methodologies for those projects, including but not limited to:
ASIC
FPGA
SDR - Software Defined Radio
DSP - Digital Signal Processor
GPU
CPU
and a number of other technologies.

We have also conducted verifications in various technologies, tools and stages of the design from specification to physical design, with technology such as
Formal verification
Functional verification.

Our verifications are carried out on different simulators, both free/open source and commercial.
Artificial Intelligence (AI) and Machine Learning (ML) technologies are also considered when carrying our design and verification, that is, when choosing EDAs for design and verification, we favor those with AI/ML algorithms to those without AI/ML.

Design of Modem, Modulator and Demodulator IP Cores

We're a design team specializing in modem and its IP cores. The modem IPs are designed for use in wireless and cable communications for home and professionals and will also be made available to industries, businesses, communities, governments and the defense in the near future.

The IP cores can be incorporated into various terminals,  indoor and outdoor units and modems on the ground.

Various communications technologies, modulation and demodulation technologies, coding technologies,  error correction schemes,  VLSI technologies (FPGA, GPU, DSP, SDR, etc) are applied to make the design compatible with the latest chip technologies and its extensibility possible.

We make the IP cores available to the industry in various forms.

We can also custom design a modem IP core for you specifically.

We can design modem IP cores for a vast scope of wireless RF and cable communications.

We're hoping that you would be interested in our designs and talk with us about a possible cooperation.

See my following books:

SATELLITE BROADBAND INTERNET MODEM - Chip Design for Satellite Broadband Internet (Satnet)

SATELLITE BROADBAND INTERNET (Satnet) MODEM - Part One: Modulator IP Core ()

Modem Design Methodologies - Reviews

ICs and IP Core Design Vendor for Modem (Modulators and Demodulators)

Satellite Communications Standards

Our Modulator, Demodulator, Modem IP Cores

Integrated Circuits for PC and Mobile Broadband Satellite Internet (SatNet) Access System with or without satellite bases, for portable uses for single person and home, movable on any point of the earth or fixed use.

Circuits have been designed and simulated using Xilinx Vivado, Altera Quartus, Mentor Graphics, Cadence Virtuoso, MATLAB/SIMULINK and other popular EDA tools.

TSMC 0.18um MMRF CMOS process technology is applied at a power supply of +/- 0.9v.

Our modulator, demodulator and modem IC cores will be applicable to DVB standards series (DVB-S2/S2X) as well as other popular satellite Internet standards.

Here below are the introduction documents of some of our modem, modulator and denmodulator IP cores: DVB

DVB Modem IP Core Datasheet Modem ()

DVB Modem IP Core Datasheet Demodulator ()

DVB Modem IP Core Datasheet Modulator VHDL ()

DVBS2 MODULATOR CORE ()

DVBS2 MODULATOR CORE

Here below are the introduction documents of some of our modem, modulator and denmodulator IP cores: RFID

RFID Datasheet - Reader VHDL & FPGA with Multi-protocol Support ()

RFID Datasheet - Tags Verilog EPC Gen-2 RFID Tag Baseband Processor ()

Here below are the introduction documents of some of our modem, modulator and denmodulator IP cores: WIFI

WIFI Datasheet - Software-Hardware Implementation of IEEE 802.11a Wifi Standard, Verilog + Matlab ()

HARDWARE VERIFICATION

Hardware Verification with AI ML

Machine Learning for Hardware Design, Verification & Manufacturing.docx
Machine Learning for Hardware Verification.docx

Hardware Verification for AMS Design

Machine Learning for Analog and Mixed Signal Verification.docx

Intro Hardware Verifications

Hardware Verification Language

Hardware Verification in Python

Hardware Verification in Python - An Abstract and Cover with TOC, Chapt. 00 Cover

Hardware Verification in Python – An Abstract

Comprehensive Review of Hardware Verification in Python – An Abstract

Verification Methodologies

Design Verificcation Process

EDAs for Hardware Verifications

Verification IPs

Books & Writing